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The SOIC-8 package has a junction-to-board thermal
characterization parameter of ψ JB =43°C/W. In a system
application, the localized temperature around the device
is a function of the layout and construction of the PCB
along with airflow across the surfaces. To ensure
reliable operation, the maximum junction temperature of
the device must not exceed the absolute maximum
rating of 150°C; with 80% derating, T J would be limited
to 120°C. Rearranging Equation 4 determines the board
temperature required to maintain the junction
temperature below 120°C:
Test Circuit
T B =T J - P TOTAL ? ψ JB
T B =120°C – 0.308W ? 43°C/W=107°C
(8)
(9)
Figure 20. Quasi-Static I OUT / V OUT Test Circuit
Differences between FAN3278 and FAN3268
FAN3278 and FAN3268 are pin-compatible to each other and are designed to drive one P-Channel and one
N-channel MOSFET in applications such as battery-powered compact fan / pump DC motor drives. However, there
are key differences, highlighted in Table 1.
Table 1. Differences between FAN3278 and FAN3268
FAN3278
FAN3268
Supply Voltage
27V Operating Maximum
30V Absolute Maximum
18V Operating Maximum
20V Absolute Maximum
Gate Drive Regulator
Yes, since the maximum operating V DD can No gate drive regulator is needed. The
be as high as 27V, the gate voltage to the gate drive voltage is V DD and the
external MOSFETs is limited to about 13V. FAN3268 switches rail-to-rail.
The optimum operating range is 8V to 27V.
After the IC turns on at about 3.8V, the
Minimum Operating
Voltage
Startup
Output Gate Drive
Architecture
OUTB Gate Drive
Current Strength
output tracks V DD up to the regulated
voltage rail of about 11~13V. Below 8V of
V DD , the FAN3278 operates, but (a) slower
and (b) with limited gate drive voltage until
it reaches around 8V.
The IC starts operating approximately at
3.8V which acts as a loose UVLO
threshold. It incorporates a “smart startup”
feature where the outputs are held OFF
before the IC starts operating.
Standard MOS-based output structure with
gate drive clamp.
Optimized for P-channel: The turn-OFF
(1.5 A) is stronger than turn-ON (1.0A).
4.1V is the UVLO turn-off voltage
which is the minimum operating
voltage.
Has the tight UVLO threshold of 4.5V
on / 4.1V off. Incorporates “smart
startup” (outputs held OFF before IC is
fully operational at the UVLO
threshold).
Compound MillerDrive? architecture
in the final output stage to provide a
more efficient gate drive current during
the Miller plateau stage of the turn-
on/turn-off switching transition.
P-channel turn-ON (2.4A) is stronger
than turn-OFF (1.6A).
? 2010 Fairchild Semiconductor Corporation
FAN3278 ? Rev. 1.0.1
12
www.fairchildsemi.com
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